ZX Spectrum +2A/2B, +3/3B edge connector
| Upper | Lower | |
|---|---|---|
| A15 | 1 | A14 |
| A13 | 2 | A12 |
| D7 | 3 | +5V |
| OE | 4 | NC |
| SLOT | 5 | SLOT |
| D0 | 6 | 0V |
| D1 | 7 | 0V |
| D2 | 8 | CKEXT |
| D6 | 9 | A0 |
| D5 | 10 | A1 |
| D3 | 11 | A2 |
| D4 | 12 | A3 |
| INT | 13 | NC |
| NMI | 14 | 0V |
| HALT | 15 | OE |
| MREQ | 16 | DRD |
| IORQ | 17 | DWR |
| RD | 18 | MTR |
| WR | 19 | BUSRQ |
| NC | 20 | RESET |
| WAIT | 21 | A7 |
| +12V | 22 | A6 |
| −12V | 23 | A5 |
| M1 | 24 | A4 |
| RFS | 25 | NC |
| A8 | 26 | BUSACK |
| A10 | 27 | A9 |
| RESET | 28 | A11 |
The ZX Spectrum +2A/+3, +2B, and +3B expansion connector is a double sided card edge connector with a 0.1 inch spacing. The two rows of conductors are numbered from right to left looking into the rear of the computer. One pair of conductors are missing as there is an indexing slot cut out of the circuit board.
Notes on Connections
CPU Clock
The CKEXT signal is available on Lower Pin 8. The CPU clock signal is generated by the gate array (IC1) and is interrupted during contended memory access. The CKEXT signal is inverted in relation to the CPU clock input.
Key Slot
The key slot ensures correct alignment of a peripheral with the edge connector. This slot is the width of one conductor and lies between Pin 4 and Pin 6, i.e. Pin 5 does not exist.
Power
The +2A/+3 and +2B are not powered from a single 9V supply as on all previous models, but by a multi rail supply. This provides the +5V, +12V, and −12V required directly and as such there is no +9V or −5V rail available on the edge connector for driving peripherals.
ROM disable pins
All the previous models of ZX Spectrum have a single ROM chip which could be disabled to facilitate paging in external memory by pulling the ROMCS line high. The +2A/+3 and +3B however have two ROM chips and brings them out to independent pins on the expansion port. The old ROMCS pin (Lower pin 25) is not used, and instead Upper pin 4 and Lower pin 15 are used. These pins were both unused on the 128K, however Lower pin 15 was used for composite video out on the 16K/48K.
Disc Controller Signals
Unlike the +3, the +2A and +2B have no floppy disc controller. Amstrad's original intention was to produce an external floppy controller addon which would have connected to the expansion port on these computers. Since the gate array is the same on all three machines, all the decoding logic is already present to generate the disk read/write and motor control signals. These three signals are therefore connected through to the expansion port. These signals occupy the pins which were originally used for the component video signals on the 16k/48k expansion port.
RESET
The RESET signal is an inverted version of the RESET signal, and is produced by one of the inverters in IC15. The purpose of this signal is unclear since any peripheral could derive it by inverting the RESET line itself. In the +3 it is connected via a 10k resistor (R76) to the floppy drive select line. This however seems to be an error in the circuit design though it has no adverse effects.