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* Cassette interface daughterboard. | * Cassette interface daughterboard. | ||
* "Datacorder" cassette mechanism. | * "Datacorder" cassette mechanism. | ||
==Timings and Contention== | |||
The contention and ram timings on the +3 and Black +2 differ significantly from earlier models due to the redesigned [[The Spectrum ULA|gate array]]. Timing patterns and memory contention are described in detail in the [[Contended_memory#.2B2A_.2F_.2B3|contended memory]] article. |