651
edits
mNo edit summary |
|||
(19 intermediate revisions by 2 users not shown) | |||
Line 1: | Line 1: | ||
{{Template:Spectrum edge connector|A15|A13|D7|[[#ROM disable pins|{{overline|OE}}]]|[[#Key Slot|SLOT]]|D0|D1|D2|D6|D5|D3|D4|{{overline|INT}}|{{overline|NMI}}|{{overline|HALT}}|{{overline|MREQ}}|{{overline|IORQ}}|{{overline|RD}}|{{overline|WR}}|[[#Power|NC]]|{{overline|WAIT}}|[[#Power|+12{{small|V}}]]|[[#Power|−12{{small|V}}]]|{{overline|M1}}|{{overline|RFS}}|A8|A10|[[#RESET|RESET]]|A14|A12|[[#Power|+5{{small|V}}]]|[[#Power|NC]]|[[#Key Slot|SLOT]]|0{{small|V}}|0{{small|V}}|[[#CPU Clock|CKEXT]]|A0|A1|A2|A3|NC|0{{small|V}}|[[#ROM disable pins|{{overline|OE}}]]|[[#Disc Controller Signals|{{overline|DRD}}]]|[[#Disc Controller Signals|{{overline|DWR}}]]|[[#Disc Controller Signals|{{overline|MTR}}]]|{{overline|BUSRQ}}|{{overline|RESET}}|A7|A6|A5|A4|[[#ROM disable pins|NC]]|{{overline|BUSACK}}|A9|A11}} | |||
| | |||
| | |||
| | |||
| | |||
| | |||
| | |||
| | |||
| | |||
|[[# | |||
| | |||
| | |||
| | |||
| | |||
|[[# | |||
|A0 | |||
|A1 | |||
|A2 | |||
|A3 | |||
|NC|| | |||
|[[#ROM disable pins| | |||
|[[#Disc Controller Signals| | |||
|[[#Disc Controller Signals| | |||
|[[#Disc Controller Signals| | |||
|A7 | |||
|A6 | |||
|A5 | |||
|A4 | |||
|[[#ROM disable pins|NC]]|| | |||
|A9 | |||
|A11 | |||
<!-- edge connector table ends --> | <!-- edge connector table ends --> | ||
The [[ZX Spectrum + | The [[ZX Spectrum +2A/2B, +3/3B|ZX Spectrum +2A/+3, +2B, and +3B]] [[:category:Edge Connectors|expansion connector]] is a double sided card edge connector with a 0.1 inch spacing. The two rows of conductors are numbered from right to left looking into the rear of the computer. | ||
One pair of conductors are missing as there is an [[#Key Slot|indexing slot]] cut out of the circuit board. | One pair of conductors are missing as there is an [[#Key Slot|indexing slot]] cut out of the circuit board. | ||
Line 74: | Line 8: | ||
====CPU Clock==== | ====CPU Clock==== | ||
The CKEXT signal is available on Lower Pin 8. The CPU clock signal is generated by the [[The Amstrad | The CKEXT signal is available on Lower Pin 8. The CPU clock signal is generated by the [[The Amstrad gate array|gate array]] (IC1) and is interrupted during [[contended memory]] access. The CKEXT signal is inverted in relation to the CPU clock input. | ||
====Key Slot==== | ====Key Slot==== | ||
Line 80: | Line 14: | ||
====Power==== | ====Power==== | ||
The +2A/+3 and +2B are not powered from a single | The +2A/+3 and +2B are not powered from a single 9{{small|V}} supply as on all previous models, but by a multi rail supply. This provides the +5{{small|V}}, +12{{small|V}}, and −12{{small|V}} required directly and as such there is no +9{{small|V}} or −5{{small|V}} rail available on the edge connector for driving peripherals. | ||
====ROM disable pins==== | ====ROM disable pins==== | ||
All the previous models of ZX Spectrum have a single ROM chip which could be disabled to facilitate paging in external memory by pulling the | All the previous models of ZX Spectrum have a single ROM chip which could be disabled to facilitate paging in external memory by pulling the {{overline|ROMCS}} line high. The +2A/+3 and +3B however have two ROM chips and brings them out to independent pins on the expansion port. The old {{overline|ROMCS}} pin (Lower pin 25) is not used, and instead Upper pin 4 and Lower pin 15 are used. These pins were both unused on the [[ZX Spectrum+ 128K edge connector|128K]], however Lower pin 15 was used for composite video out on the [[ZX Spectrum 16K/48K edge connector|16K/48K]]. | ||
====Disc Controller Signals==== | ====Disc Controller Signals==== | ||
Unlike the +3, the +2A and +2B have no floppy disc controller. Amstrad's original intention was to produce an external floppy controller addon which would have connected to the expansion port on these computers. Since the [[The Amstrad | Unlike the +3, the +2A and +2B have no floppy disc controller. Amstrad's original intention was to produce an external floppy controller addon which would have connected to the expansion port on these computers. Since the [[The Amstrad gate array|gate array]] is the same on all three machines, all the decoding logic is already present to generate the disk read/write and motor control signals. These three signals are therefore connected through to the expansion port. | ||
These signals occupy the pins which were originally used for the component video signals on the [[ | These signals occupy the pins which were originally used for the component video signals on the [[ZX Spectrum 16k/48k Edge Connector|16k/48k]] expansion port. | ||
====RESET==== | ====RESET==== | ||
... This | The RESET signal is an inverted version of the {{overline|RESET}} signal, and is produced by one of the inverters in IC15. The purpose of this signal is unclear since any peripheral could derive it by inverting the {{overline|RESET}} line itself. In the +3 it is connected via a 10k resistor (R76) to the floppy drive select line. This however seems to be an error in the circuit design though it has no adverse effects. | ||
[[Category:Edge connectors]] | |||
[[Category:Hardware]] | |||
[[Category:Spectrum]] |