The network interface is provided by WIZnet W5100 which is an all-in-one ethernet controller with a hardware TCP/IP stack. The spectranet also includes 128kB of flash memory and 128kB of static RAM. A Xilinx XC9572 CPLD implements a control and status register in addition to the logic for paging and execution traps. 
The w5100 is used in memory mapped mode, and this along with the flash memory and SRAM are accessed in 4kB pages in the bottom 16kB of the Spectrum's memory map, i.e. the ROM area — 0x0000–0x3FFF. The spectranet has a fixed page of flash memory at 0x0000–0x0FFF, and a fixed page of SRAM at 0x3000−0x3FFF. Any block of the interface's memory (including the ethernet chip) can be placed in the remaining two 4kB spaces. These locations are referred to as Page A (0x1000–0x1FFF) and Page B (0x2000–0x2FFF).
For software writers, a set of BASIC extensions are provided, as well as a C API (whose design is based on the BSD sockets library). Access to these functions and to Spectranet RAM is via call traps and paging. The full project source is available on Github.
Ben Versteeg from ByteDelight started manufacturing new Spectranet boards in 2019.
Software for the Spectranet includes: