ZX80/81 edge connector
| Upper | Lower | |
|---|---|---|
| D7′ | 1 | +5V |
| RAMCS′ | 2 | +9V |
| SLOT | 3 | SLOT |
| D0′ | 4 | 0V |
| D1′ | 5 | 0V |
| D2′ | 6 | Φ |
| D6′ | 7 | A0 |
| D5′ | 8 | A1 |
| D3′ | 9 | A2 |
| D4′ | 10 | A3 |
| INT | 11 | A15 |
| NMI | 12 | A14 |
| HALT | 13 | A13 |
| MREQ | 14 | A12 |
| IORQ | 15 | A11 |
| RD | 16 | A10 |
| WR | 17 | A9 |
| BUSAK | 18 | A8 |
| WAIT | 19 | A7 |
| BUSRQ | 20 | A6 |
| RESET | 21 | A5 |
| M1 | 22 | A4 |
| RFSH | 23 | ROMCS′ |
The Sinclair ZX80 and ZX81 expansion ports use a double sided card edge connector with a 0.1 inch spacing. The two rows of conductors are numbered from right to left looking into the rear of the computer. One pair of conductors are missing as there is an indexing slot cut out of the circuit board.
Notes on Connections
Data Bus
The data bus signals presented on the edge connector are connected to the RAM and ROM ICs which are separated from the CPU by series resistors. This is denoted by the addition of the prime symbol.
Chip Select
RAMCS′ and ROMCS′ are connected directly to the ROM and RAM chip select inputs. They are connected to the computer's logic via series resistors so that their value can be overridden by an external peripheral which is denoted by the prime symbol.
The ROMCS′ signal is only present on the ZX81. On the ZX80 this pin is NOT connected.
CPU Clock
The Φ signal is available on Lower Pin 6. This clock signal is inverted to provide the clock for the Z80.
Key Slot
The key slot ensures correct alignment of a peripheral with the edge connector. This slot is the width of one conductor and lies between Pin 2 and Pin 4, i.e. Pin 3 does not exist.
Power
- Lower Pin 1 is connected to the smoothed +5 volt DC output of the internal 7805 regulator.
- Lower Pin 2 is connected to the +9 volt (nominal) unregulated DC power supply.