Z80: Difference between revisions

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17 bytes added ,  8 April 2014
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→‎BIT n,(HL): Alter style of linking
(Rearrange SCF/CCF section)
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=== BIT n,(HL) ===
=== BIT n,(HL) ===


Upon executing BIT n,(HL) instructions, bits 3 and 5 of the F register are [http://zx.pk.ru/attachment.php?attachmentid=2989 memptr_eng.txt copied from an internally buffered register pair] now commonly referred to as MEMPTR.
Upon executing BIT n,(HL) instructions, bits 3 and 5 of the F register are copied from an internally buffered register pair now commonly referred to as MEMPTR, as described in [http://zx.pk.ru/attachment.php?attachmentid=2989 memptr_eng.txt].


Woody has confirmed that bits 3 and 5 of the flags are copied on all BIT instructions on both a Zilog Z80 and an NEC clone (stated on the link above as being "unverified").
Woody has confirmed that bits 3 and 5 of the flags are copied on all BIT instructions on both a Zilog Z80 and an NEC clone (stated on the link above as being "unverified").

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