707
edits
Z80: Difference between revisions
Jump to navigation
Jump to search
Add a short contended memory section
(→LD A,I and LD A,R in NMOS Z80s: Usefulness for OUT (C),0/255) |
(Add a short contended memory section) |
||
| Line 6: | Line 6: | ||
{{Main|Z80 Programming#Instruction Set}} | {{Main|Z80 Programming#Instruction Set}} | ||
The instruction set of the Z80 in an extension of that of the Intel 8080. An entirely different set of assembly | The instruction set of the Z80 in an extension of that of the Intel 8080. An entirely different set of assembly mnemonics is used. 8080 compatibility allowed the Z80 to be used in many CP/M systems, and this compatibility allowed CP/M to run on the ZX Spectrum +3, and a CP/M compatible system, Pro-DOS, to run on the SAM Coupé. | ||
Zilog have released numerous clones of the Z80. In addition, there are numerous processors such as the R800 and T80 that are largely compatible with the Z80's instruction set. | Zilog have released numerous clones of the Z80. In addition, there are numerous processors such as the R800 and T80 that are largely compatible with the Z80's instruction set. | ||
== Contended memory == | |||
{{Main|Contended memory}} | |||
Computers using the Z80 tended to run at a relatively high clock speed by for the time, compared to certain other processors such as the MOS 6502 and Motorola 6809. Doing so was required to achieve a decent level of performance, as on average, the Z80 required a larger number of clock cycles per instruction executed. This high clock speed would typically eliminate cycle stealing as a means of sharing video memory between the display generation hardware and the CPU. If a display is to be generated whilst video memory is being accessed, this leaves a choice of comparatively expensive VRAM with a dedicated read port for display generation, or a memory contention scheme where by the CPU will is halted when the display hardware requires access to video memory. The ZX Spectrum uses a memory contention scheme, but with a slight quirk — the /MREQ line that signifies whether the Z80 is performing memory access is not decoded by the original Sinclair models, meaning that the CPU can be slowed down as a result of values placed onto its address bus when not performing a memory access. This issue was later fixed by Amstrad for the Spectrum +3 and +2A/+2B, but by this time, a certain amount of software had grown to depend on the behaviour of the original Sinclair models. | |||
== OUT (C),0 / OUT (C),255 Instruction == | == OUT (C),0 / OUT (C),255 Instruction == | ||